POLISHING OF ELECTROSTATIC SUBSTRATE SUPPORT GEOMETRIES

• Main Authors: HE JIM ZHONGYI, BOYD WENDELL G JR
• Format: Patent
• Language: Chinese; English
• Published: 21.04.2020
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Methods of polishing a patterned surface of an electrostatic chucking (ESC) substrate support to be used in plasma assisted or plasma enhanced semiconductor manufacturing chambers are provided herein.In particular, embodiments described herein, provide polishing methods that round and debur the edges of elevated features and remove dielectric material from the non-substrate contacting surfaces ofa patterned substrate support to reduce defectivity associated therewith. 本文中提供待使用于等离子体辅助半导体制造腔室或等离子体增强半导体制造腔室中的抛光静电卡紧(ESC)基板支撑件的图案化表面的方法。具体地，本文中描述的实施例提供抛光方法，所述抛光方法将升高特征的边缘圆化并去毛边并且从图案化基板支撑件的非基板接触表面移除介电材料，以减少和其相关联的缺陷。