MULTI-STAGE SAMPLER WITH INCREASED GAIN
Methods and systems are described for obtaining, at an input stage of a sampler, a continuous-time analog differential voltage, and responsively generating an integrated analog differential voltage bydischarging a pair of pre-charged output nodes in an integration period according to the continuous-...
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Main Author | |
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Format | Patent |
Language | Chinese English |
Published |
17.04.2020
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Subjects | |
Online Access | Get full text |
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Summary: | Methods and systems are described for obtaining, at an input stage of a sampler, a continuous-time analog differential voltage, and responsively generating an integrated analog differential voltage bydischarging a pair of pre-charged output nodes in an integration period according to the continuous-time analog differential voltage, the integration period initiated by a sampling clock, and providing the integrated analog differential voltage to a plurality of slicing circuits having inputs connected to the pair of output nodes, each slicing circuit of the plurality of slicing circuits generating a respective sliced output signal based on a respective slicing threshold of a set of slicing thresholds.
描述了方法和系统,用于由采样器的输入处理级获得连续时间模拟差分电压,并通过在积分周期内根据所述连续时间模拟差分电压对一对预充电的输出节点进行放电而响应地生成积分模拟差分电压,所述积分周期由采样时钟启动;并且将所述积分模拟差分电压提供给输入端连接至所述一对输出节点的多个切片电路,该多个切片电路中的每一切片电路均根据一组切片阈值中的相应切片阈值生成相应切片输出信号。 |
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Bibliography: | Application Number: CN201880046748 |