Semiconductor device including gate pattern having pad region

• Main Authors: IM JI WOON, JANG SE MEE, LEE DONG IK, KIM DAI HONG, NAM BO RA
• Format: Patent
• Language: Chinese; English
• Published: 20.03.2020
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Provided is a semiconductor device including a gate pattern having a pad region. A semiconductor device includes a gate pattern disposed over a lower structure, and including a gate electrode region and a gate pad region extending from the gate electrode region; and a vertical channel semiconductor layer having a side surface facing the gate electrode region of the gate pattern. The gate pad region includes a first pad region having a thickness greater than a thickness of the gate electrode region. The first pad region includes an upper surface, a lower surface opposing the upper surface, andan outer side surface. The outer side surface has a lower outer side surface and an upper outer side surface, divided from each other by a boundary portion. The lower outer side surface extends from the lower surface, and a connection portion of the lower outer side surface and the lower surface has a rounded shape. 本公开提供了包括具有焊盘区域的栅极图案的半导体器件。一种半导体器件包括：栅极图案，设置在下结构之上，并包括栅极电极区域和从栅极电极区域延伸的栅极焊盘区域；以及垂直沟道半导体层，具有面对栅极图案的栅极电极区域的侧表面