Reusable method for processor IO register test excitation

• Main Authors: ZHU WEI, LI FENG, JIAN LUTIAN, WU SHAN, XIE JUN, NING YONGBO, LIU JIAJI
• Format: Patent
• Language: Chinese; English
• Published: 17.01.2020
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention discloses a reusable method for processor IO register test excitation, and belongs to the technical field of computer architecture processors. The method comprises the steps that a parent class for IO register read-write testing is defined; and inheriting the test subclass of the parent class on a component-level or chip-level IO interface. Test excitation of the same IO register indifferent test environments does not need to be repeatedly developed, the total test excitation development amount is remarkably reduced, the error convergence speed related to the IO register is increased, and the processor verification period is shortened. And the test excitation inheritance is good, and the usability is enhanced. 一种用于处理器IO寄存器测试激励的可重用方法，属于计算机体系结构处理器技术领域。方法包括定义IO寄存器读写测试用的父类；在部件级或芯片级的IO接口上，实现继承上述父类的测试子类。本发明不用重复开发同一IO寄存器在不同测试环境下的测试激励，显著减少测试激励开发总量，加快了IO寄存器相关的错误收敛速度，压缩了处理器验证周期。测试激励可继承性良好，易用性增强。