System and method for long addition and long multiplication in associative memory
A method for an associative memory device includes replacing a set of three multi-bit binary numbers P, Q and R, stored in the associative memory device, with two multi-bit binary numbers X and Y, also stored in the associative memory device, wherein a sum of the binary numbers P, Q and R is equal t...
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Main Author | |
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Format | Patent |
Language | Chinese English |
Published |
17.09.2019
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Subjects | |
Online Access | Get full text |
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Summary: | A method for an associative memory device includes replacing a set of three multi-bit binary numbers P, Q and R, stored in the associative memory device, with two multi-bit binary numbers X and Y, also stored in the associative memory device, wherein a sum of the binary numbers P, Q and R is equal to a sum of the binary numbers X and Y. A system includes an associative memory array having rows and columns and a multi-bit multiplier. Each column of the array stores two multi-bit binary numbers to be multiplied. The multi-bit multiplier multiplies, in parallel, the two multi-bit binary numbers per column by concurrently processing all bits of partial products generated by the multiplier. The multiplier performs the processing without any carry propagation delay when adding all but the last two partial products.
一种用于关联存储器设备的方法包括用存储在关联存储器设备中的两个多比特二进制数X和Y来替换同样存储在关联存储器设备中的三个多比特二进制数P、Q和R的集合,其中,二进制数P、Q和R的总和等于二进制数X和Y的总和。一种系统包括具有行和列的关联存储器阵列和多比特乘法器。阵列的每列存储要相乘的两个多比特二进制数。多比特乘法器通过并发地处理由乘法器生成的部分乘积的所有比特来并行地使每列的两个多比特二进制数相乘。乘法 |
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Bibliography: | Application Number: CN201910034114 |