SYSTEMS, METHODS AND APPARATUS FOR ENABLING HIGH VOLTAGE CIRCUITS
Systems, methods and apparatus for coexistence of high voltage and low voltage devices and circuits on a same integrated circuit fabricated in silicon-on-insulator (SOI) technology are described. In particular, techniques for mitigating back gate effects are described, including using of resistive a...
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Main Authors | , , , , |
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Format | Patent |
Language | Chinese English |
Published |
02.08.2019
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Subjects | |
Online Access | Get full text |
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Summary: | Systems, methods and apparatus for coexistence of high voltage and low voltage devices and circuits on a same integrated circuit fabricated in silicon-on-insulator (SOI) technology are described. In particular, techniques for mitigating back gate effects are described, including using of resistive and/or capacitive couplings to control surface potentials at regions of a substrate used for the SOIfabrication proximate the high voltage and low voltage devices and circuits. In one case, an N-type implant is used to provide a high potential differential with respect to a substrate potential.
描述了用于高电压和低电压器件以及电路在以绝缘体上硅(SOI)技术制备的同一集成电路上共存的系统、方法和设备。具体地,描述了用于减轻背栅效应的技术,包括使用电阻耦合和/或电容耦合来控制在用于SOI制备的衬底的靠近高电压和低电压器件以及电路的区域处的表面电势。在一种情况下,使用N型注入来提供相对于衬底电势的高电势差。 |
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Bibliography: | Application Number: CN201780078779 |