EQUALIZING ERASE DEPTH IN DIFFERENT BLOCKS OF MEMORY CELLS

• Main Authors: ZHANG ZHENGYI, DONG YINGDA, YU XUEHONG, ZENG CAIFU, PANG LIANG
• Format: Patent
• Language: Chinese; English
• Published: 21.05.2019
• Subjects: INFORMATION STORAGE; PHYSICS; STATIC STORES

A memory device and associated techniques provide a uniform erase depth for different blocks of memory cells which are at different distances from pass gates of a voltage source. In one approach, a voltage of a source side select gate transistor of a memory string is a decreasing function of the distance. In another approach, a magnitude or duration of an erase voltage at a source end of a memorystring is an increasing function of the distance. Adjacent blocks can be arranged in subsets and treated as being at a common distance. In another approach, an additional erase pulse can be applied when the distance of the block exceeds a threshold. Other variables such as initial erase voltage and step size can also be adjusted as a function of distance. 本发明公开了存储器设备和相关联技术，它们为存储器单元的不同块提供均匀的擦除深度，所述存储器单元的不同块与电压源的通道栅极的距离不同。在一种方法中，存储器串的源极侧选择栅极晶体管的电压是所述距离的递减函数。在另一种方法中，存储器串的源极端处的擦除电压的量值或持续时间是所述距离的递增函数。相邻的块可以被布置在子集中并且被视为处于共同的距离。在另一种方法中，当块的距离超过阈值时，可以施加附加的擦除脉冲。其他变量诸如初始擦除电压和步长大小也可以作为距离的函数进行调节。