A MEMORY DEVICE FOR STORING AND OUTPUTTING AN ADDRESS ACCRODING TO AN INTERNAL COMMAND AND OPERATING METHOD THEREOF

A memory device includes first and second bank groups, an internal command generator, and an address input/output circuit. Each of the bank groups includes a plurality of banks. The internal command generator generates and outputs internal commands to a first target bank. The internal commands are g...

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Bibliographic Details
Main Authors HWANG HYONG-RYOL, SHIN SEUNG-JUN
Format Patent
LanguageChinese
English
Published 14.05.2019
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Summary:A memory device includes first and second bank groups, an internal command generator, and an address input/output circuit. Each of the bank groups includes a plurality of banks. The internal command generator generates and outputs internal commands to a first target bank. The internal commands are generated based on a command from a memory controller for controlling a memory operation of the firsttarget bank. The address input/output (I/O) circuit receive a first address corresponding to the command, selects a storage path of the first address based on whether there is a bubble interval in adata burst operation interval corresponding to the first command, controls output of the first address in accordance with a time point at which each of the internal commands is output. The first address is stored in the address I/O circuit. 一种存储器器件,包括第一存储体组、第二存储体组、内部命令生成器和地址输入/输出(I/O)电路。每个存储体组可以包括多个存储体。内部命令生成器生成内部命令,并向第一目标存储体输出内部命令。所述内部命令是基于来自存储器控制器的用于控制第一目标存储体的存储器操作的命令而生成的。地址输入/输出(I/O)电路,接收与所述命令对应的第一地址,基于在与第一命令对应的数据突发操作间隔
Bibliography:Application Number: CN201810913085