SCALABLE STOCHASTIC SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER

Some embodiments include apparatuses and methods using capacitor circuitry to sample a value of an input signal; comparators to compare the value of the input signal with a range of voltage values andprovide comparison results; successive approximation register (SAR) logic circuitry to generate firs...

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Bibliographic Details
Main Authors MAERKOVICH SOPHIA, LAKDAWALA HASNAIN, DEGANI OFIR, ESHEL GORDON
Format Patent
LanguageChinese
English
Published 16.04.2019
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Summary:Some embodiments include apparatuses and methods using capacitor circuitry to sample a value of an input signal; comparators to compare the value of the input signal with a range of voltage values andprovide comparison results; successive approximation register (SAR) logic circuitry to generate first bits and second bits based on the comparison results; and circuitry to calculate an average valueof a value of the second bits and a value of bits of a portion of the first bits, and to generate output bits representing the value of the input signal, the output bits including bits generated based on the average value. 些实施例包括设备和方法,其使用电容器电路对输入信号的值进行采样;使用比较器将输入信号的值与系列电压值进行比较,并提供比较结果;使用逐次逼近寄存器(SAR)逻辑电路基于比较结果生成第位和第二位;以及使用电路计算第二位的值与第位的部分位的值的平均值,并且生成表示输入信号的值的输出位,该输出位包括基于平均值生成的位。
Bibliography:Application Number: CN201780053343