A SoC prototype verification method based on FPGA

• Main Authors: GUO GUANGHAO, LIU ZHIZHE, ZHAO CHENXU
• Format: Patent
• Language: Chinese; English
• Published: 19.03.2019
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention discloses a SoC prototype verification method based on FPGA. The prototype verification system adopted is composed of a motherboard and a daughter board. The FPGA of the motherboard comprises a SoC module to be tested (1) and a motherboard interface control module (2). The daughter board is connected with the motherboard through a test connector (3); the daughter board FPGA comprisesa daughter board interface control module (4) and a test interface (5). A motherboard interface control module (2) compresses and sends signals of modules to be tested to a daughter board interface control module (4) by using a time division multiplexing technology, and the daughter board interface control module (4) extracts and analyzes signals to be distributed to a test interface (5), and thetest interface (5) is connected with a test device. This method is free from the prototype verification system FPGA storage resources are limited, using the built-in logic analyzer tool ChipScope subject to test signal bit wi