INTEGRATED CIRCUIT CALIBRATION ARCHITECTURE

• Main Author: SHARMA VIKAS
• Format: Patent
• Language: Chinese; English
• Published: 01.03.2019
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; TRANSMISSION

A calibration architecture that enables accurate calibration of radio frequency (RF) integrated circuits (ICs) chips used in transceiver RF systems in a relatively simple testing environment. Embodiments of the invention include one or more on-chip switchable internal calibration paths that enable direct coupling of a portion of the on-chip circuit to an RF test system while isolating other circuitry on the chip. Periodic self-calibration of an RF IC can be performed after initial factory calibration, so that adjustments in desired performance parameters can be made while such an IC is embedded within a final system, and/or to take into account component degradation due to age or other factors. 种校准架构，其能够在相对简单的测试环境中准确校准在收发器RF系统中使用的射频(RF)集成电路(IC)芯片。本发明的实施方式包括个或更多个芯片上可切换内部校准路径，其能够将芯片上电路的部分直接耦接至RF测试系统，同时隔离芯片上的其他电路系统。可以在初始工厂校准之后执行RF IC的周期性自校准，使得可以在这样的IC嵌入到最终系统内时进行对期望的性能参数的调节，以及/或者考虑由于老化或其他因素导致的部件劣化。