Low voltage charge domain sample hold circuit

• Main Authors: HE NINGYE, CHEN ZHENHAI, WEI JINGHE, HU JUAN, NING RENXIA, HOU LI, SUN JIAN, XU YUAN, LYU HAIJIANG
• Format: Patent
• Language: Chinese; English
• Published: 01.03.2019
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRICITY

The invention belongs to the technical field of integrated circuit design and specifically a low voltage charge domain sample hold circuit. The circuit comprises a gate voltage bootstrap switch Ss1, agate voltage bootstrap switch Ss2, a positive end sample capacitor Cp, a negative end sample circuit Cn, a low voltage high swing charge transmission circuit p, a low voltage large swing charge transmission circuit n, 4 voltage transmission switches and a transmission drive circuit. The circuit has the advantages that according to the low voltage charge domain sample hold circuit provided by theinvention, the problem that signal swing in existing charge domain pipelined ADCs is limited is overcome, and the circuit can be widely applied to various charge domain pipelined ADCs. 本发明属于集成电路设计技术领域，具体为种低电压电荷域采样保持电路，该电路包括：栅压自举开关Ss1、栅压自举开关Ss2、正端采样电容Cp、负端采样电容Cn、低电压大摆幅电荷传输电路p、低电压大摆幅电荷传输电路n、4个电压传输开关和传输驱动电路。其优点是：本发明所提供的低电压电荷域采样保持电路，克服了现有电荷域流水线ADC中信号摆幅受限的问题，可以广泛应用于各类电荷域流水线ADC中。