Semiconductor device having vertical transistor equipped with aligning gate electrode and method of fabricating the same

A semiconductor device includes an active pillar on a substrate. A first source/drain region is disposed at a top end of the active pillar and has a greater width than the active pillar. A first insulating layer is disposed on a sidewall of the active pillar and a second insulating layer is disposed...

Full description

Saved in:
Bibliographic Details
Main Authors YUNIL LEE, SUNGIL PARK, JUNGGUN YOU, DONGHUN LEE, MIRCO CANTORO, CHANGHEE KIM
Format Patent
LanguageChinese
English
Published 07.09.2018
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A semiconductor device includes an active pillar on a substrate. A first source/drain region is disposed at a top end of the active pillar and has a greater width than the active pillar. A first insulating layer is disposed on a sidewall of the active pillar and a second insulating layer is disposed on at least a bottom surface of the first source/drain region. A gate electrode is disposed on thefirst insulating layer and the second insulating layer. A second source/drain region is disposed in the substrate at a bottom end of the active pillar. Methods of fabrication are also described. 种半导体器件包括衬底上的有源柱。第源极/漏极区设置在有源柱的顶端处并具有比有源柱更大的宽度。第绝缘层设置在有源柱的侧壁上,第二绝缘层至少设置在第源极/漏极区的底表面上。栅电极设置在第绝缘层和第二绝缘层上。第二源极/漏极区在有源柱的底端处设置在衬底中。还描述了制造方法。
Bibliography:Application Number: CN201810156564