Method, system and program product for SADP-friendly interconnect structure track generation

• Main Authors: HARITEZ NARISETTY, SHITIZ ARORA, JOHN LEE
• Format: Patent
• Language: Chinese; English
• Published: 22.05.2018
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention relates to a method, a system and a program product for SADP-friendly interconnect structure track generation. The method includes providing a semiconductor interconnect implementation tool, and designing, using any one, a combination or all of the self-aligned double-patterning-friendly rule(s) described herein and in conjunction with the semiconductor interconnect implementation tool, at least two routing layers, each routing layer having routing lines, the routing lines including line(s) having a default width and line(s) having a non-default width. A system and a program product corresponding to the method are also provided. 本发明涉及SADP友好互连结构轨迹生成的方法、系统及程序产品，其中，种方法包括提供半导体互连实施工具，以及通过使用本文中所述并结合该半导体互连实施工具的项或多项自对准双重图案化友好规则的其中任意项、组合或全部来设计至少两个布线层，各布线层具有多条布线，该些布线包括具有默认宽度的条或多条线以及具有非默认宽度的条或多条线。本发明还提供对应该方法的系统及程序产品。