ULTRA LOW PHASE NOISE FREQUENCY SYNTHESIZER

A system for providing ultra low phase noise frequency synthesizers using fractional-N PLL (Phase Lock Loop), sampling reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts o...

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Bibliographic Details
Main Authors JOSEFSBERG YEKUTIEL, LAVIAN TAL I
Format Patent
LanguageChinese
English
Published 17.04.2018
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Summary:A system for providing ultra low phase noise frequency synthesizers using fractional-N PLL (Phase Lock Loop), sampling reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. Theperformance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprise single loop frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5 degree) which would enable users to receive high data rate. This proposedsystem overcomes deficiencies of current generation state of the communication systems in the prior art by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data
Bibliography:Application Number: CN2016840744