Continuous-time cascaded sigma-delta analog-to-digital converter
A multi-rate cascaded continuous-time analog-to-digital converter has a plurality of sigma-delta modulator stages and includes first and second continuous-time sigma-delta modulators, and a summationelement. The first continuous-time sigma-delta modulator operates at a first sampling rate. The secon...
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Main Authors | , |
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Format | Patent |
Language | Chinese English |
Published |
23.03.2018
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Subjects | |
Online Access | Get full text |
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Summary: | A multi-rate cascaded continuous-time analog-to-digital converter has a plurality of sigma-delta modulator stages and includes first and second continuous-time sigma-delta modulators, and a summationelement. The first continuous-time sigma-delta modulator operates at a first sampling rate. The second continuous-time sigma-delta modulator operates at a second sampling rate higher than the first sampling rate. The second continuous-time sigma-delta modulator has a continuous-time voltage controlled oscillator (VCO) quantizer, and a feedback loop coupled between the input and the output. The second continuous-time sigma-delta modulator is cascaded with the first continuous-time sigma-delta modulator. The summation element has inputs coupled to outputs of the first and second continuous-timesigma-delta modulators.
种多速率级联连续时间模数转换器具有多个积分三角调制器级,且包括第和第二连续时间积分三角调制器以及求和元件。所述第连续时间积分三角调制器在第采样速率下操作。所述第二连续时间积分三角调制器在高于所述第采样速率的第二采样速率下操作。所述第二连续时间积分三角调制器具有连续时间压控振荡器(VCO)量化器和耦合于输入端与输出端之间的反馈回路。所述第二连续时间积分三角调制器与所述第连续时间积分三角调制器级联。所述求 |
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Bibliography: | Application Number: CN201710816104 |