Embedded substrate
The invention relates to the technical field of integrated circuits, and discloses an embedded substrate. The embedded substrate is used for solving a problem that an embedded substrate limits the further improvement of the packaging integration degree in the prior art because all chips of the embed...
Saved in:
Main Authors | , , |
---|---|
Format | Patent |
Language | Chinese English |
Published |
19.01.2018
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | The invention relates to the technical field of integrated circuits, and discloses an embedded substrate. The embedded substrate is used for solving a problem that an embedded substrate limits the further improvement of the packaging integration degree in the prior art because all chips of the embedded substrate occupies a bigger space and the reliability of products is lower. The embedded substrate comprises a substrate, wherein two sides of the substrate in the thickness direction are respectively provided with at least one first cavity and at least two first electronic devices, and each first electronic device is corresponding to one first cavity; packaging layers which are respectively disposed in each first cavity and respectively wrap the first electronic devices in the first cavities, and is provided with a plurality of first connection holes, wherein each first connection hole is corresponding to one pin of one first electronic device, and is connected with a corresponding pin;and a conductive circuit |
---|---|
AbstractList | The invention relates to the technical field of integrated circuits, and discloses an embedded substrate. The embedded substrate is used for solving a problem that an embedded substrate limits the further improvement of the packaging integration degree in the prior art because all chips of the embedded substrate occupies a bigger space and the reliability of products is lower. The embedded substrate comprises a substrate, wherein two sides of the substrate in the thickness direction are respectively provided with at least one first cavity and at least two first electronic devices, and each first electronic device is corresponding to one first cavity; packaging layers which are respectively disposed in each first cavity and respectively wrap the first electronic devices in the first cavities, and is provided with a plurality of first connection holes, wherein each first connection hole is corresponding to one pin of one first electronic device, and is connected with a corresponding pin;and a conductive circuit |
Author | LIAO XIAOJING WANG JUNHE PENG HAO |
Author_xml | – fullname: WANG JUNHE – fullname: LIAO XIAOJING – fullname: PENG HAO |
BookMark | eNrjYmDJy89L5WQQcs1NSk1JSU1RKC5NKi4pSixJ5WFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8c5-hgbmZoZAYOJoTIwaALqxIao |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
DocumentTitleAlternate | 种嵌入式基板 |
ExternalDocumentID | CN107611114A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_CN107611114A3 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 14:35:03 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | Chinese English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_CN107611114A3 |
Notes | Application Number: CN201710643126 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180119&DB=EPODOC&CC=CN&NR=107611114A |
ParticipantIDs | epo_espacenet_CN107611114A |
PublicationCentury | 2000 |
PublicationDate | 20180119 |
PublicationDateYYYYMMDD | 2018-01-19 |
PublicationDate_xml | – month: 01 year: 2018 text: 20180119 day: 19 |
PublicationDecade | 2010 |
PublicationYear | 2018 |
RelatedCompanies | HUAWEI TECHNOLOGIES CO., LTD |
RelatedCompanies_xml | – name: HUAWEI TECHNOLOGIES CO., LTD |
Score | 3.2484674 |
Snippet | The invention relates to the technical field of integrated circuits, and discloses an embedded substrate. The embedded substrate is used for solving a problem... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | Embedded substrate |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180119&DB=EPODOC&locale=&CC=CN&NR=107611114A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQSTWyNEq0MDbRNUhNNNc1MTRJ1rWwNE3RNTRNSjYDdt6MksB3LPn6mXmEmnhFmEYwMWTB9sKAzwktBx-OCMxRycD8XgIurwsQg1gu4LWVxfpJmUChfHu3EFsXNWjv2NACdISZmouTrWuAv4u_s5qzs62zn5pfEOhuVTNQ6WDiyMzACmpGg87Zdw1zAu1KKUCuUtwEGdgCgKbllQgxMFVlCDNwOsNuXhNm4PCFTngDmdC8VyzCIOSam5QKLCZSFIqBmR18qKwog6Kba4izhy7Q8Hi4T-Kd_RDuMBZjYAH28FMlGBSAfRBgz8vQ0jTVIsXE0tgkySIVWJEmGiWapBknATmSDFK4zZHCJynNwAUKFdCYgaGlDANLSVFpqiywFi1JkgN7HwBZhnQY |
link.rule.ids | 230,309,786,891,25594,76904 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQSTWyNEq0MDbRNUhNNNc1MTRJ1rWwNE3RNTRNSjYDdt6MksB3LPn6mXmEmnhFmEYwMWTB9sKAzwktBx-OCMxRycD8XgIurwsQg1gu4LWVxfpJmUChfHu3EFsXNWjv2NACdISZmouTrWuAv4u_s5qzs62zn5pfEOhuVTNQ6WDiyMzAag7sEoLO2XcNcwLtSilArlLcBBnYAoCm5ZUIMTBVZQgzcDrDbl4TZuDwhU54A5nQvFcswiDkmpuUCiwmUhSKgZkdfKisKIOim2uIs4cu0PB4uE_inf0Q7jAWY2AB9vBTJRgUgH0QYM_L0NI01SLFxNLYJMkiFViRJholmqQZJwE5kgxSuM2Rwicpz8DpEeLrE-_j6ectzcAFCiHQ-IGhpQwDS0lRaaossEYtSZIDBwUA7Jd3Aw |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Embedded+substrate&rft.inventor=WANG+JUNHE&rft.inventor=LIAO+XIAOJING&rft.inventor=PENG+HAO&rft.date=2018-01-19&rft.externalDBID=A&rft.externalDocID=CN107611114A |