Calibration of a resistor in a current mirror circuit

The invention discloses a calibration of a resistor in a current mirror circuit. A reference stage includes a first transistor, a second transistor and a resistor that are connected in series from a voltage rail to a reference load. The resistor has (i) a resistance that is a function of a digital r...

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Bibliographic Details
Main Author LIN YU-TSO
Format Patent
LanguageChinese
English
Published 19.12.2017
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Summary:The invention discloses a calibration of a resistor in a current mirror circuit. A reference stage includes a first transistor, a second transistor and a resistor that are connected in series from a voltage rail to a reference load. The resistor has (i) a resistance that is a function of a digital resistance-controlling value, (ii) a first terminal coupled to a gate of the first transistor, and (iii) a second terminal that has a voltage VG2 and is coupled to a gate of the second transistor. A comparator has a first input that is coupled to the resistor's second terminal. A diode-connected reference transistor is connected from the voltage rail to the comparator's second input to apply a voltage VD at the second input. An adjusting circuit adjusts the digital resistance-controlling value to cause VG2 to approach VD until the comparator's output changes state when VG2 reaches VD. 本揭露涉及电流镜电路中电阻器的校正。种参考级包含从电压轨串联连接至参考负载的第晶体管、第二晶体管及电阻器。所述电阻器具有(i)电阻,其随数字电阻控制值变化;(ii)第端,其耦合至所述第晶体管的栅极;以及(iii)第二端,其具有电压VG2且耦合至所述第二晶体管的栅极。
Bibliography:Application Number: CN201710334236