Memory descriptor list caching and pipeline processing

• Main Authors: KARIVARADASWAMY SATHYANARAYANAN, WILSON MEI L, KRISHNAN JITESH
• Format: Patent
• Language: Chinese; English
• Published: 29.08.2017
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

A method is configured to increase efficiency of buffer usage within a pipeline of a computing device. The method includes creation of a buffer (120) in memory (110) of the computing device and caching of a memory descriptor list (208) by the computing device that describes the buffer in a buffer information cache (122) and has associated therewith a handle (210) that acts as a lookup to the memory descriptor list. The method also includes passing the handle through the pipeline (216) of the computing device for processing of data within the buffer by one or more stages (218,220) of the pipeline such that access to the data is obtained by the one or more stages by using the handle as the lookup as part of a call to obtain the memory descriptor list for the buffer from the buffer information cache. 种方法被配置为提高计算设备的管道内的缓冲器使用的效率。该方法包括在计算设备的存储器（110）中创建缓冲器（120）并且由计算设备高速缓存存储器描述符列表（208），该存储器描述符列表在缓冲器信息高速缓存器（122）中描述缓冲器并且与用作对存储器描述符列表的查找的句柄（210）相关联。该方法还包括传递句柄以通过计算设备的管道（216），从而由管道的个或多个阶段（218,220）处理缓冲器内的数据，使得由所述个或多个阶段通过作为调