Layout checking system and method

The embodiment of the invention provides a layout checking method that includes the operation below. Groups, indicating layout patterns of interconnection layers, are assigned to a circuit, to determine layout constraints of the circuit. Layout patterns are extracted from a layout design for the cir...

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Bibliographic Details
Main Authors HSIEH YAO-JEN, LIU KAI-MING
Format Patent
LanguageChinese
English
Published 29.08.2017
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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