Apparatus and method for implementing power saving techniques when processing floating point value

An apparatus and method are described for reducing power when reading and writing graphics data. For example, one embodiment of an apparatus comprises: a graphics processor unit (GPU) to process graphics data including floating point data; a set of registers, at least one of the registers of the set...

Full description

Saved in:
Bibliographic Details
Main Authors KIM YOUNG MOON, PARK SANG PHILL
Format Patent
LanguageChinese
English
Published 01.08.2017
Subjects
CALCULATING
COMPUTING
COUNTING
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:An apparatus and method are described for reducing power when reading and writing graphics data. For example, one embodiment of an apparatus comprises: a graphics processor unit (GPU) to process graphics data including floating point data; a set of registers, at least one of the registers of the set partitioned to store the floating point data; and encode/decode logic to reduce a number of binary 1 values being read from the at least one register by causing a specified set of bit positions within the floating point data to be read out as 0s rather than 1s. 描述了当读取和写入图形数据时用于减少功率的装置和方法。例如，装置的个实施例包括：图形处理单元(GPU)，其用于处理包括浮点数据的图形数据；组寄存器，该组中的寄存器中的至少个寄存器被划分用于存储浮点数据；以及编码/解码逻辑，其用于通过使浮点数据内的指定组的比特位置被读出为0而非1来减少从该至少个寄存器读取的二进制1值的数量。
Bibliography:Application Number: CN201580064719