Low overhead hierarchical connectivity of cache coherent agents to a coherent fabric
In an example, a system-on-a-chip comprises a plurality of multi-core processors, such as four dual-core processors for eight total cores. Each of the processors connects to shared resources such as memory and peripherals via a shared uncore fabric. Because each input bus for each core can include h...
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Main Authors | , , , , |
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Format | Patent |
Language | Chinese English |
Published |
01.08.2017
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Subjects | |
Online Access | Get full text |
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Summary: | In an example, a system-on-a-chip comprises a plurality of multi-core processors, such as four dual-core processors for eight total cores. Each of the processors connects to shared resources such as memory and peripherals via a shared uncore fabric. Because each input bus for each core can include hundreds of data lines, the number of lines into the shared uncore fabric can become prohibitive. Thus, inputs from each core are multiplexed, such as in a two-to-one configuration. The multiplexing may be a non-blocking, queued (such as FIFO) multiplexing to ensure that all packets from all cores are delivered to the uncore fabric. In certain embodiment, some smaller input lines may be provided to the uncore fabric non-multiplexed, and returns (outputs) from the uncore fabric to the cores may also be non-multiplexed.
在个示例中,种片上系统包括多个多核处理器,诸如总共八个核的四个双核处理器。处理器中的每个经由共享非核结构连接到共享资源(诸如存储器和外围设备)。因为用于每个核的每个输入总线可以包括数百个数据线,到所述共享非核结构中的线的数目可能变得过高。因此,来自每个核的输入被多路复用,诸如以二到的配置。所述多路复用可以是非阻塞的、排队的(诸如FIFO)多路复用,以确保来自所有核的所有分组被递送到所述非核结构。在某 |
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Bibliography: | Application Number: CN201580064473 |