Systems and methods for chip to chip communication

• Main Authors: THURSTON JASON ALAN, ARCUDIA KENNETH LUIS
• Format: Patent
• Language: Chinese; English
• Published: 31.05.2017
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

Systems and methods for chip to chip communication are disclosed. In an exemplary aspect, a chip to chip link comprises a master device having a data transmitter, a clock, a clock transmitter, a phase locked loop (PLL) associated with the clock, and a receiver. The chip to chip link also comprises a slave device that has a data transmitter, a clock receiver, and a data receiver. Noticeably absent from the slave device is a clock or a PLL. By removing the clock from the slave device, the slave device does not have the power consuming element of a slave PLL. Further, because the slave device does not have a clock which would normally have to acquire a new frequency and settle, the master clock may change frequency relatively quickly and vary the frequency across many frequencies, not just one or two predefined frequencies. 公开了用于芯片到芯片通信的系统和方法。在示例性方面，芯片到芯片链路包括主设备，主设备具有数据发射机、时钟、时钟发射机、与时钟相关联的锁相环(PLL)以及接收机。芯片到芯片链路还包括从设备，从设备具有数据发射机、时钟接收机和数据接收机。值得注意的是，从设备缺少时钟或PLL。通过从从设备移除时钟，从设备不具有从PLL的功率消耗元件。此外，因为从设备不具有通常需要获取新频率并且稳定的时