High-speed and low-power-consumption PAM4 transmitter
The invention relates to a high-speed and low-power-consumption PAM4 transmitter used for high-speed serial interfaces, which belongs to the field of analog circuit design. The transmitter is operated based on the PAM4 encoding. In a 8: 2 combiner wherein 8 parallel paths of data are synthesized int...
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Main Authors | , , , , |
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Format | Patent |
Language | Chinese English |
Published |
26.04.2017
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Subjects | |
Online Access | Get full text |
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Summary: | The invention relates to a high-speed and low-power-consumption PAM4 transmitter used for high-speed serial interfaces, which belongs to the field of analog circuit design. The transmitter is operated based on the PAM4 encoding. In a 8: 2 combiner wherein 8 parallel paths of data are synthesized into 2 paths of data, a 4: 1 combiner is adopted instead of a 8: 4 and 4: 2 two-stage 2: 1 combiner. Therefore, the combiner and corresponding clock link structure is simplified, and the power consumption and the area are greatly saved.
本发明涉及种高速低功耗PAM4发射机,用于高速串行接口,属于模拟电路设计领域;该发射机使用PAM4编码,在8:2合路(并行8路数据合成2路数据)时使用4:1合路器代替8:4和4:2的两级2:1合路器,从而简化了合路器及相应时钟链路的结构,大大节约了功耗和面积。 |
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Bibliography: | Application Number: CN201611104172 |