Manufacturing method of LTPS (low temperature poly-silicon) array substrate and array substrate

• Main Author: YIN WANTING
• Format: Patent
• Language: Chinese; English
• Published: 22.02.2017
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention provides an LTPS (low temperature poly-silicon) array substrate which comprises a substrate, grids arranged on the surface of the substrate in a stacking manner, an insulating layer covering the grids and the substrate, drain and source electrodes arranged on the insulating layer in the stacking manner, wherein a groove is formed between the drain and source electrodes, and an ion doped layer covering the groove and part of the drain and source electrodes. A manufacturing method of the LTPS array substrate comprises the following steps that after a metal layer is formed on the substrate in a deposition manner, the grids of the array substrate are formed through once photomask and twice etching; and the ion doped layer containing an N ion doped polycrystalline silicon layer and a P ion doped polycrystalline silicon layer are obtained through the process of once photomask, multiple etching and twice ion doping. Compared with the manufacturing method of the traditional LTPS array substrate, with ad