Focal plane array zero-clearance reading out method and circuit based on half-row alternating
The invention provides a focal plane array zero-clearance reading out method and circuit based on half-row alternating. The sequential operation and the connection relation of the circuit are innovation points of the invention and form the core of the zero-clearance reading out circuit, and the work...
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Main Authors | , , , , , , |
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Format | Patent |
Language | Chinese English |
Published |
31.08.2016
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Subjects | |
Online Access | Get full text |
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Summary: | The invention provides a focal plane array zero-clearance reading out method and circuit based on half-row alternating. The sequential operation and the connection relation of the circuit are innovation points of the invention and form the core of the zero-clearance reading out circuit, and the working process of the reading out circuit forms the zero-clearance reading out method of the invention. A whole focal plane is divided into left and right two groups, that is to say, each row is divided into left and right two sides, and alternative reading out is carried out every a half row. For a focal plane array having N rows and M columns, when the reading out circuit is reading out the left half row of a ith row (1<=i<=N), charge transfer is carried out on the right haft row of the ith row so as to get ready for reading out; and when the reading out circuit is reading out the right haft row of the ith row, a column level circuit is carrying out charge transfer on the left haft row of a (i+1)th row, and the left |
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Bibliography: | Application Number: CN201610384425 |