Sn-plated material for electronic component

• Main Authors: Nakatani Katsuya, Yamazaki Hirotaka, Nagano Mayuki
• Format: Patent
• Language: Chinese; English
• Published: 31.08.2016
• Subjects: APPARATUS THEREFOR; BASIC ELECTRIC ELEMENTS; CABLES; CHEMISTRY; CONDUCTORS; CURRENT COLLECTORS; ELECTRICITY; ELECTROFORMING; ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; INSULATORS; LINE CONNECTORS; METALLURGY; PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTIONOF COATINGS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING ORDIELECTRIC PROPERTIES

The invention aims to provide a Sn-plated material for preparing a conductive spring for connectors and terminals, wherein the Sn-plated material is low in insertion resistance and good in surface gloss. The Sn-plated material is characterized in that a Sn plating layer subjected to reflow soldering treatment is formed on a basis material of copper or copper alloy. The reflow soldering Sn plating layer is composed of an upper Sn layer and a lower Cu-Sn alloy layer. The thickness of the Sn plating layer is 0.2-0.8 mum. The surface roughness Ra of the Sn-plated material is smaller than 0.05 mum in the rolled right-angle direction. The RSm is smaller than 20 mum. The area ratio of the Cu-Sn alloy layer, exposed to the outmost surface thereof, is 5 to 40%. Viewed from the surface, the crystal grain diameter of the exposed Cu-Sn alloy layer is smaller than 3 mum. 本发明的目的在于提供种作为连接器、端子等的导电性弹簧材料具有低拔插性和良好的表面光泽的镀Sn材料，其特征在于，该镀Sn材料在铜或铜合金条的基体材料上具有实施了回流焊处理的Sn镀层，其中，回流焊Sn镀层由上侧的Sn层和下侧的Cu-Sn合金层构成，Sn镀层的厚度为0.2～0.8μm，镀Sn材料的轧制直角方向的