Semiconductor substrate and manufacturing method thereof

The invention relates to a semiconductor substrate, which comprises an organic material layer, a first redistribution layer, a second redistribution layer, a plurality of first engagement features and a plurality of second engagement features, wherein the organic material layer comprises two surface...

Full description

Saved in:
Bibliographic Details
Main Author HSIAO, WEI-MIN
Format Patent
LanguageEnglish
Published 10.02.2016
Subjects
Online AccessGet full text

Cover

Loading…
Abstract The invention relates to a semiconductor substrate, which comprises an organic material layer, a first redistribution layer, a second redistribution layer, a plurality of first engagement features and a plurality of second engagement features, wherein the organic material layer comprises two surfaces and covers a plurality of metal columns; the first redistribution layer is located at one surface of the organic material layer and is electrically connected to the metal columns; the second redistribution layer is located at the other surface of the organic material layer and is electrically connected to the metal columns; the plurality of first engagement features are mutually spaced by a first distance; the plurality of second engagement features are mutually spaced by a second distance, and the first distance is greater than the second distance.
AbstractList The invention relates to a semiconductor substrate, which comprises an organic material layer, a first redistribution layer, a second redistribution layer, a plurality of first engagement features and a plurality of second engagement features, wherein the organic material layer comprises two surfaces and covers a plurality of metal columns; the first redistribution layer is located at one surface of the organic material layer and is electrically connected to the metal columns; the second redistribution layer is located at the other surface of the organic material layer and is electrically connected to the metal columns; the plurality of first engagement features are mutually spaced by a first distance; the plurality of second engagement features are mutually spaced by a second distance, and the first distance is greater than the second distance.
Author HSIAO, WEI-MIN
Author_xml – fullname: HSIAO, WEI-MIN
BookMark eNrjYmDJy89L5WSwCE7NzUzOz0spTS7JL1IoLk0qLilKLElVSMxLUchNzCtNS0wuKS3KzEtXyE0tychPUSjJSC1KzU_jYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GBqbGRoYWlkaOxsSoAQBskzDM
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
ExternalDocumentID CN105321892A
GroupedDBID EVB
ID FETCH-epo_espacenet_CN105321892A3
IEDL.DBID EVB
IngestDate Fri Jul 19 16:37:38 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_CN105321892A3
Notes Application Number: CN20141341520
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160210&DB=EPODOC&CC=CN&NR=105321892A
ParticipantIDs epo_espacenet_CN105321892A
PublicationCentury 2000
PublicationDate 20160210
PublicationDateYYYYMMDD 2016-02-10
PublicationDate_xml – month: 02
  year: 2016
  text: 20160210
  day: 10
PublicationDecade 2010
PublicationYear 2016
RelatedCompanies ADVANCED SEMICONDUCTOR ENGINEERING, INC
RelatedCompanies_xml – name: ADVANCED SEMICONDUCTOR ENGINEERING, INC
Score 3.0122511
Snippet The invention relates to a semiconductor substrate, which comprises an organic material layer, a first redistribution layer, a second redistribution layer, a...
SourceID epo
SourceType Open Access Repository
SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title Semiconductor substrate and manufacturing method thereof
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160210&DB=EPODOC&locale=&CC=CN&NR=105321892A
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1dS8MwFL3MKeqbTkXnBxGkb8V-bstDEZe2DGHd0Cl7G80SQcF0rB3-fW9i53zRt5JCSEJOzk1yzwnADXUoEqkn7TwU0g4kRUhRgXN53u0FHpe5x7XeeZh1Bs_BwzScNuB9rYUxPqGfxhwRETVHvFdmvV5sDrFik1tZ3vI3LCru0kkUW_Xu2O3oLYwV96NkPIpHzGIsYpmVPWKsG_rIZtS734JtHUZrn_3kpa9VKYvflJIewM4Ya1PVITSkasEeW7-81oLdYX3hjZ819soj6D3pPPZCaYPWYklKRLxxliW5EuQjVyutUTCiQ_L9LDTRsZ0sXo_hOk0mbGBjE2Y__Z2xbNNa_wSaqlDyFAiVws2RsUXoyEB0Pe7Nqc85BhS-z4Xrn0H773ra__08h309djoZ2XUuoFktV_ISubbiV2aQvgC944PI
link.rule.ids 230,309,786,891,25594,76906
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1dT8IwFL1BNOKbokbxqyZmb0T2BfSBGOlYprJBFA1vZKU10cSOwIh_39s6xBd9W7qkaZuentv2nlOAK9qgSKSOrKe-kHVPUoQUFTiXp62253CZOlzrneOkGT1792N_XIL3lRbG-IR-GnNERNQU8Z6b9Xq2PsQKTG7l4pq_YVF2E446gVXsju2m3sJYQbfTGw6CAbMY67DESh4x1vVdZDPq3G7AZku78-rQ6aWrVSmz35QS7sLWEGtT-R6UpKpCha1eXqvCdlxceONngb3FPrSfdB57prRBazYnC0S8cZYlqRLkI1VLrVEwokPy_Sw00bGdzF4P4DLsjVhUxyZMfvo7Ycm6te4hlFWm5BEQKoWdImMLvyE90XK4M6Uu5xhQuC4XtnsMtb_rqf338wIq0SjuT_p3ycMJ7Ohx1InJduMUyvl8Kc-Qd3N-bgbsCxBghrU
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Semiconductor+substrate+and+manufacturing+method+thereof&rft.inventor=HSIAO%2C+WEI-MIN&rft.date=2016-02-10&rft.externalDBID=A&rft.externalDocID=CN105321892A