CDR CIRCUIT AND SEMICONDUCTOR DEVICE

The invention discloses a CDR circuit and a semiconductor device. Even if unexpected frequency fluctuation is generated in a oscillating circuit of CDR circuit due to temperature varies, a frequency pulling operation for a input data style is not updated to enable a oscillating clock signal to synch...

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Bibliographic Details
Main Authors RYO ENDO, MITSUNORI TAKANASHI
Format Patent
LanguageEnglish
Published 20.01.2016
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Summary:The invention discloses a CDR circuit and a semiconductor device. Even if unexpected frequency fluctuation is generated in a oscillating circuit of CDR circuit due to temperature varies, a frequency pulling operation for a input data style is not updated to enable a oscillating clock signal to synchronize relative to the input data. A clock data recovery (CDR) circuit is provided with a circuit that updates a locked oscillation frequency, with a small loop gain, after phase lock based on a phase-locked loop circuit for a frequency-locked frequency is completed by a frequency-locked loop circuit or during a phase lock operation. Since the locked oscillation frequency is updated with a small loop gain, it is possible to correct a fluctuation in a frequency of an oscillation circuit in the frequency-locked loop circuit without oscillating a phase-locked loop undesirably even during a phase lock operation.
Bibliography:Application Number: CN20151410326