Low swing dynamic circuit

Embodiments of the present disclosure enable low swing dynamic circuits with reduced dynamic power and leakage power. In an embodiment, a level detector circuit monitors the pre-charge voltage level of the dynamic node of a dynamic circuit and discontinues the charging of the dynamic node when the p...

Full description

Saved in:
Bibliographic Details
Main Author JOSHI SACHIN
Format Patent
LanguageChinese
English
Published 26.03.2014
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
Online AccessGet full text

Cover

More Information
Summary:Embodiments of the present disclosure enable low swing dynamic circuits with reduced dynamic power and leakage power. In an embodiment, a level detector circuit monitors the pre-charge voltage level of the dynamic node of a dynamic circuit and discontinues the charging of the dynamic node when the pre-charge voltage exceeds a logic high reference voltage. The logic high reference voltage is selected below a supply voltage of the dynamic circuit, resulting in a low swing dynamic circuit. In another embodiment, the pull-down logic circuitry is disconnected from the dynamic node when the dynamic node voltage falls below a logic low reference voltage, above a ground voltage. In another embodiment, a DC keeper circuit of the dynamic circuit is configured based on the pre-charge level of the dynamic node.
Bibliography:Application Number: CN201310269765