Forming method of shallow trench isolation structure

• Main Author: ZENG SHAOHAI
• Format: Patent
• Language: Chinese; English
• Published: 26.03.2014
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention relates to a forming method of a shallow trench isolation structure. According to the method, strained germanium silicon and the silicon dioxide on the side walls of a shallow trench serve as strained isolation layers for filling the shallow trench, due to the fact that the lattice constant of germanium in the strained germanium silicon is larger than that of silicon, pressure stress can be introduced to the trench of an MOS (metal oxide semiconductor) device; according to the 4.1% lattice difference between germanium and silicon in the strained germanium silicon, the mobility of holes and electrons can be greatly improved; meanwhile, the silicon dioxide layers on the side walls of the shallow trench can achieve isolation effects. Besides, the forming method of the shallow trench isolation structure is compatible with the existing bulk silicon technology, thereby greatly reducing the investment on improvement technical environments and further reducing the production cost. Therefore, based on th