Improved method of bipolar integrated circuit amplification coefficient process

The invention relates to an improved method of a bipolar integrated circuit amplification coefficient process, comprising a step of manufacturing a basic circuit of a bipolar integrated circuit compatible with a BJT (Bipolar Junction Transistor) and a JFET (Junction Field-Effect Transistor) by a con...

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Bibliographic Details
Main Authors DING JIHONG, CHEN JIXUE, ZHANG XUEMING, GAO BO, JIAN CHONGXI, LV DONGFENG
Format Patent
LanguageChinese
English
Published 03.04.2013
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Summary:The invention relates to an improved method of a bipolar integrated circuit amplification coefficient process, comprising a step of manufacturing a basic circuit of a bipolar integrated circuit compatible with a BJT (Bipolar Junction Transistor) and a JFET (Junction Field-Effect Transistor) by a conventional process, a step of manufacturing an electrode lead wire on the basic circuit and a step of carrying out follow-up process arrangement. The improved method is characterized in that the step of manufacturing the electrode lead wire on the basic circuit comprises the steps of: 1, primary photoetching and corrosion on a contact hole; 2, hole oxidization; 3, silicon nitride deposition; 4, secondary photoetching and hole secondary corrosion on the contact hole; 5, pure aluminum sputtering; and 6, formation of the electrode lead wire (25) and a press welding point by the photoetching and the corrosion. The improved method disclosed by the invention has the following advantages that (1) the stress of a silicon ni
Bibliography:Application Number: CN20121425954