Chip-stacked semiconductor package

A chip-stacked semiconductor package including a stacked chip structure including a plurality of separate chips stacked on each other; a flexible circuit substrate having the stacked chip structure mounted on a first side of the flexible circuit substrate in a first region of the flexible circuit su...

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Bibliographic Details
Main Author KO JI-HAN
Format Patent
LanguageChinese
English
Published 09.01.2013
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A chip-stacked semiconductor package including a stacked chip structure including a plurality of separate chips stacked on each other; a flexible circuit substrate having the stacked chip structure mounted on a first side of the flexible circuit substrate in a first region of the flexible circuit substrate, and being electrically connected to at least one of the plurality of separate chips of the stacked chip structure by folding a second region of the flexible circuit substrate; a sealing portion sealing the stacked chip structure and the flexible circuit substrate; and an external connecting terminal on a second side of the flexible circuit substrate.
Bibliography:Application Number: CN20121230013