Method for improving static random access memory reading redundancy

The invention provides a method for improving static random access memory reading redundancy. The method comprises the following process steps: firstly, generating an NMOS (N-channel metal oxide semiconductor) polysilicon gate prefilling photoetching plate on a pattern board; then carrying out the f...

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Bibliographic Details
Main Author YU LIUJIANG
Format Patent
LanguageEnglish
Published 18.03.2015
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Summary:The invention provides a method for improving static random access memory reading redundancy. The method comprises the following process steps: firstly, generating an NMOS (N-channel metal oxide semiconductor) polysilicon gate prefilling photoetching plate on a pattern board; then carrying out the filling of pentels on a pass gate and a pull-down area which are not covered by the photoetching plate at a NMOS area; generating a PMOS (P-channel metal oxide semiconductor) polysilicon gate prefilling photoetching plate on the pattern board; and carrying out the filling of pentels on the pass gate and the pull-down area which are not covered by the photoetching plate in the PMOS polysilicon gate prefilling photoetching plate. With the adoption of the method for improving the static random access memory reading redundancy, the doping concentration of the polysilicon gate of the pass gate is reduced effectively, thereby increasing the parasitic resistance of the polysilicon gate and the grid use-up phenomenon of the polysilicon gate, so that in the reading process, the level of a node 8 is reduced, and the reading redundancy of a random access memory is increased.
Bibliography:Application Number: CN201210158723