Summing device of SET/MOS (Single Electron Transistor/Metal Oxide Semiconductor) mixed structure based on threshold logic

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Main Authors HE MINGHUA, CHEN JINFENG, WEI RONGSHAN, CHEN SHOUCHANG
Format Patent
LanguageEnglish
Published 06.05.2015
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Author HE MINGHUA
CHEN JINFENG
WEI RONGSHAN
CHEN SHOUCHANG
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SubjectTerms BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
Title Summing device of SET/MOS (Single Electron Transistor/Metal Oxide Semiconductor) mixed structure based on threshold logic
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