Summing device of SET/MOS (Single Electron Transistor/Metal Oxide Semiconductor) mixed structure based on threshold logic

Saved in:
Bibliographic Details
Main Authors HE MINGHUA, CHEN JINFENG, WEI RONGSHAN, CHEN SHOUCHANG
Format Patent
LanguageEnglish
Published 06.05.2015
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
Online AccessGet full text

Cover

More Information
Bibliography:Application Number: CN2012101121