Heat insulation domino circuit and heat insulation domino ternary AND gate circuit

• Main Authors: WANG PENGJUN, YANG QIANKUN
• Format: Patent
• Language: Chinese; English
• Published: 21.03.2012
• Subjects: BASIC ELECTRONIC CIRCUITRY; ELECTRICITY; PULSE TECHNIQUE

The invention discloses a heat insulation domino circuit comprising a first PMOS (P-channel Metal Oxide Semiconductor) transistor, a first NMOS (N-channel Metal Oxide Semiconductor) transistor, a delay circuit and a logic circuit, wherein the logic circuit is arranged between the source electrode of the first PMOS transistor and the drain electrode of the first NMOS transistor; the grid electrodeof the first PMOS transistor and the grid electrode of the first NMOS transistor are connected at a clock-controlled clock signal input end in parallel; the drain electrode of the first PMOS transistor and the drain electrode of the first NMOS transistor are connected at the output end of the relay circuit in parallel; and the input end of the relay circuit is connected with a power clock signal input end, and the delayed power clock and the clock-controlled clock form a two-phase overlapping clock. In addition, the invention discloses a heat insulation domino ternary AND gate circuit which combines the heat insulatio