Spacer formation in the fabrication of planar bipolar transistors
A bipolar transistor is fabricated having a collector (52) in a substrate (1) and a base (57, 58) and an emitter (59) formed over the substrate. The base has a stack region (57) which is laterally separated from the emitter (59) by an electrically insulating spacer (71). The insulating spacer (71) h...
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Main Authors | , , , |
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Format | Patent |
Language | Chinese English |
Published |
12.10.2011
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Subjects | |
Online Access | Get full text |
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Summary: | A bipolar transistor is fabricated having a collector (52) in a substrate (1) and a base (57, 58) and an emitter (59) formed over the substrate. The base has a stack region (57) which is laterally separated from the emitter (59) by an electrically insulating spacer (71). The insulating spacer (71) has a width dimension at its top end at least as large as the width dimension at its bottom end and forms a r-shape or an oblique shape. The profile reduces the risk of silicide bridging at the top of the spacer in subsequent processing, while maintaining the width of emitter window. |
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Bibliography: | Application Number: CN201110083001 |