Semiconductor structure and manufacturing method thereof

• Main Authors: HUANG KUO BIN, CHERN CHYI SHYUAN, CHEN RYAN CHIA-JEN, LIN CHIN-HSIANG, YANG CHI-MING, LI SSU-YI
• Format: Patent
• Language: Chinese; English
• Published: 03.10.2012
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The present invention provides one embodiment of a method for making metal gate stacks of semiconductor structures. The method includes forming a first dummy gate and a second dummy gate on a substrate; removing a polysilicon layer from the first dummy gate, resulting in a first gate trench; forming a first metal layer and a first aluminum layer in the first gate trench; applying a chemical mechanical polishing (CMP) process to the substrate; performing an annealing process to the first aluminum layer using a nitrogen and oxygen containing gas, forming an interfacial layer of aluminum, nitrogen and oxygen on the first aluminum layer; thereafter removing the polysilicon layer from the second dummy gate, resulting in a second gate trench; and forming a second metal layer and a second aluminum layer on the second metal layer in the second gate trench. The method is advantaged by avoiding threshold voltage excursion of a p-type field effect transistor (pFET), reducing RC delay of the semiconductor structure, and