Low-voltage differential-signal time-sequence test system and method
The invention relates to a low-voltage differential-signal time-sequence test method. The method comprises the following steps of: acquiring the waveforms of a data signal and a clock signal; selecting a clock cycle from the waveforms of the clock signal; recognizing the start time of various bits o...
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | Chinese English |
Published |
01.06.2011
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | The invention relates to a low-voltage differential-signal time-sequence test method. The method comprises the following steps of: acquiring the waveforms of a data signal and a clock signal; selecting a clock cycle from the waveforms of the clock signal; recognizing the start time of various bits of data transferred in the selected clock cycle from the waveforms of the data signal; calculating the time difference between the start time of each bit of data and a start point of the selected clock cycle; calculating the minimum value and the maximum value of the time difference between the start time of each bit of data and the start point of the selected clock cycle according to the time difference between the start time of each bit of data and the start point of the selected clock cycle, which is acquired through repeated calculation; and outputting the minimum value and the maximum value of the time difference between the start time of each bit of data and the start point of the selected clock cycle. The inv |
---|---|
Bibliography: | Application Number: CN20091310585 |