Lithography robustness monitor

• Main Authors: VEENDRICK HENDRICUS JOSEPH MAR, BENTEN HAROLD GERARDUS PIETER, BARGAGLI-STOFFI AGNESE ANTONIE
• Format: Patent
• Language: Chinese; English
• Published: 22.12.2010
• Subjects: APPARATUS SPECIALLY ADAPTED THEREFOR; BASIC ELECTRIC ELEMENTS; CINEMATOGRAPHY; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; ELECTROGRAPHY; HOLOGRAPHY; MATERIALS THEREFOR; ORIGINALS THEREFOR; PHOTOGRAPHY; PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES; PHYSICS; SEMICONDUCTOR DEVICES

The present invention relates to a method and device for monitoring a lithographic process of an integrated circuit. In a first step a design for an integrated circuit is provided. The integrated circuit comprises at least an integrated circuit transistor pair having a gate of a first transistor connected to a gate of a second transistor. The gate of the second transistor is designed such that it has a predetermined overlap with respect to a source and a drain of the second transistor. A detection circuit is connected to the at least an integrated circuit transistor pair for detecting if in operation functionality of the second transistor of each of the at least an integrated circuit transistor pair is one of a transistor and a short circuit. The integrated circuit is then manufactured in dependence upon the design. After manufacturing, the detection circuit is used to determine the functionality of the second transistor of each of the at least an integrated circuit transistor pair.