Enhanced localized distributive capacitance for circuit boards
A multi-layered circuit board is provided having a buried capacitive layer and a device-specific embedded, localized, non-discrete, and distributive capacitive element. A printed circuit board is provided including (1) a first dielectric layer, (2) a first conductive layer coupled to a first surface...
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Main Author | |
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Format | Patent |
Language | Chinese English |
Published |
17.02.2010
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Subjects | |
Online Access | Get full text |
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Summary: | A multi-layered circuit board is provided having a buried capacitive layer and a device-specific embedded, localized, non-discrete, and distributive capacitive element. A printed circuit board is provided including (1) a first dielectric layer, (2) a first conductive layer coupled to a first surface of the first dielectric layer, (3) a second conductive layer coupled to a second surface of the first dielectric layer, and (4) a localized distributive non-discrete capacitive element adjacent the first conductive layer, wherein the capacitive element occupies a region that approximately coincideswith a location over which a device to be coupled to the capacitive element is to be mounted. The embedded, localized, non-discrete, and distributive capacitive element may provide device-specific capacitance to suppress voltage/current noise for a particular device. |
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Bibliography: | Application Number: CN2008810835 |