Pretreatment method for check matrix of bit reliability mapping

The invention relates to a pretreatment method for a check matrix of bit reliability mapping used for an LDPC coding modulation system, belonging to the technical field of wireless communication. The method comprises the following steps: generating a check matrix; reranking according to the row of e...

Full description

Saved in:
Bibliographic Details
Main Authors XU YOUYUN, YU HUI, XIA ZHISHENG, CUI JING, ZHOU HONGYUAN
Format Patent
LanguageChinese
English
Published 16.12.2009
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:The invention relates to a pretreatment method for a check matrix of bit reliability mapping used for an LDPC coding modulation system, belonging to the technical field of wireless communication. The method comprises the following steps: generating a check matrix; reranking according to the row of every bit node of the check matrix; dividing the check matrix into L blocks of sub-matrixes with equal column number; reranking the divided check matrix; and obtaining the check matrix which can be used for bit reliability mapping after pre-treatment. The invention removes an interleaver needed for bit reliability mapping in the LDPC coding modulation system and the coded array can map according to a natural order, thus reducing realization complexity, shortening system time delay greatly; the column exchange of check matrix has no influence on the code word performance, so the system performance is totally the same as traditional bit reliability mapping realization method.
Bibliography:Application Number: CN2009154598