Two transistor static random access memory and its memory cell
The invention discloses a double transistor type static random access memory and the memory cell. The memory cell includes: a first N-type switching element which has a control end connected to a wordline, furthermore, a first end of the first N-type switching element is connected to a first bit lin...
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Main Authors | , , |
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Format | Patent |
Language | Chinese English |
Published |
09.06.2010
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Subjects | |
Online Access | Get full text |
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Summary: | The invention discloses a double transistor type static random access memory and the memory cell. The memory cell includes: a first N-type switching element which has a control end connected to a wordline, furthermore, a first end of the first N-type switching element is connected to a first bit line; a second N-type switching element which has the control end connected to the word line, furthermore, a first end of the second N-type switching element is connected to a bit line with opposite phase; a first memory node, a first end of the first memory node is connected to the second end of thefirst N-type switching element; and a second memory node, a first end of the second memory node is connected to a second of the second N-type switching element. The memory can reduce the SRAM distribution area by more than 40% compared with the SRAM composed of 6T memory cell. The user needs no external data refresh circuit to update the SRAM data. |
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Bibliography: | Application Number: CN2008192995 |