Semiconductor structure with layer or structure identification mark and manufacturing method and application thereof

• Main Authors: LIN YUZHENG, GUO ZHIRONG, ZHANG QIHUA, DONG WEICHUN
• Format: Patent
• Language: Chinese; English
• Published: 20.04.2011
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention provides a semiconductor structure of an identifying mark with a layer or a structure, and the identifying mark is used to accurately peel off a structure layer when a semiconductor fault is analyzed. The structure comprises a device area, a test pattern area, a layer or structure identifying mark area, wherein the device area comprises a gate oxide layer, a gate, a contact window, a metal layer, a via hole and a dielectric layer, and the test pattern area comprises a simulated device structure and a dielectric layer. The layer or structure identifying mark area is arranged near a typical pattern when needing to analyze, and comprises the identifying mark and the dielectric layer. Using the identifying mark, the analyzed structure layer is capable of being clearly determined, thereby being capable of increasing the efficiency of fault analysis, improving the design for fault analysis, and improving the design for testing.