Outer watchdog circuit

The circuit comprises: a watch-dog chip (U1) whose dog-feeding input end (WDI) is connected to the dog-feeding signal source, and whose reset output end (RST) is used for outputting a reset signal; a first order RC circuit connected to the power failure detection input (PFI) of the watch-dog chip (U...

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Bibliographic Details
Main Authors CHEN WEI, BAO PEIYOU, FENG MING, CAI NINGGUO, YAN NINGNING, WU XIAOHUA
Format Patent
LanguageChinese
English
Published 23.04.2008
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:The circuit comprises: a watch-dog chip (U1) whose dog-feeding input end (WDI) is connected to the dog-feeding signal source, and whose reset output end (RST) is used for outputting a reset signal; a first order RC circuit connected to the power failure detection input (PFI) of the watch-dog chip (U1) and used for adjusting the time length in which the input voltage of said PFI is made to equal to the reference voltage; the power failure detection output end (PFO) is connected to the reset input end (MR); the state of both PFO and MR are the same high level or low level. The invention can be used for disabling the watch-dog when the CPU is powered on.
Bibliography:Application Number: CN20061136563