Register circuit, scanning register circuit applying same and scanning method

The present invention provides a register circuit, which includes a latch circuit for latching an input data and generating an output data; an input signal selecting circuit, which is coupled with a non-testing data and a testing date respectively, and is used to selectively output the non-testing d...

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Bibliographic Details
Main Authors XIE SHANGZHI, SHEN ZIBIN
Format Patent
LanguageChinese
English
Published 19.03.2008
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:The present invention provides a register circuit, which includes a latch circuit for latching an input data and generating an output data; an input signal selecting circuit, which is coupled with a non-testing data and a testing date respectively, and is used to selectively output the non-testing data and the testing date to act as the input date; a control circuit, which is coupled on a drive clock, and is used to determine the output date according to that the drive clock controls whether the latch circuit can latch the input data; and a scan circuit, which is coupled on the drive clock and the latch circuit, and is used to generate a scan date according to the output date outputted by the drive clock scanning the latch circuit.
Bibliography:Application Number: CN20061153623