Method and apparatus for a digital-to-phase converter
A DPC ( 300 ) includes: a frequency source ( 310 ) for generating a clock signal; a delay line ( 320 ) for receiving the clock signal and generating phase-shifted clock signals at output taps; a digital control device ( 330 ) for generating a control signal; and a windowing and selection circuit for...
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Main Authors | , , |
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Format | Patent |
Language | Chinese English |
Published |
10.11.2010
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Subjects | |
Online Access | Get full text |
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Summary: | A DPC ( 300 ) includes: a frequency source ( 310 ) for generating a clock signal; a delay line ( 320 ) for receiving the clock signal and generating phase-shifted clock signals at output taps; a digital control device ( 330 ) for generating a control signal; and a windowing and selection circuit for generating the output signal, that includes sequential logic devices ( 500, 510, 520 ) and a combining network. A method for use in a DPC includes: receiving ( 400 ) a control signal based on a desired output signal that identifies a first output tap on the delay line; based on the control signal,selecting ( 410 ) at least two output taps on the delay line for receiving at least two different phase-shifted clock signals; and generating ( 420 ) an output signal based on the control signal and the received phase-shifted clock signals that is substantially the desired output signal. |
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Bibliography: | Application Number: CN2005837829 |