Eeprom devices and methods of operating and fabricating the same
In one aspect, an electrically erasable and programmable read-only memory (EEPROM) is provided. The EEPROM includes a semiconductor substrate including spaced apart first, second and third active regions, a common floating gate traversing over the first through third active regions, source/drain reg...
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Main Author | |
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Format | Patent |
Language | English |
Published |
08.08.2007
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Subjects | |
Online Access | Get full text |
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Summary: | In one aspect, an electrically erasable and programmable read-only memory (EEPROM) is provided. The EEPROM includes a semiconductor substrate including spaced apart first, second and third active regions, a common floating gate traversing over the first through third active regions, source/drain regions formed in the third active region on opposite sides of the floating gate, a first interconnect connected to the first active region, a second interconnect connected to the second active region, and a third interconnect connected to either one of the source/drain regions. |
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Bibliography: | Application Number: CN200610064394 |