METHOD AND APPARATUS FOR PROVIDING DISTRIBUTED CONTROL IN MAIN MEMORY UNIT OF DATA PROCESSING SYSTEM

For use in a data processing system, a main memory subsystem includes a plurality of memory boards for storing groups of logic signals. Each memory board includes a plurality of array units. Each array unit is adapted to store a group of logic signals that is equivalent in size to the field of data...

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Bibliographic Details
Main Authors DAVID C. SENERCHIA ET AL, PAUL J. NATUSCH, EUGENE L. YU
Format Patent
LanguageEnglish
Published 14.03.1990
Edition5
Subjects
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Summary:For use in a data processing system, a main memory subsystem includes a plurality of memory boards for storing groups of logic signals. Each memory board includes a plurality of array units. Each array unit is adapted to store a group of logic signals that is equivalent in size to the field of data logic signals transferred on the system bus and has an address structure so that each addressable data signal group can be stored in a signale array. The address field of each array unit is further adapted so that the probability of interfering activity in each array is low. The arrays are adapted to process data signal groups independently, thus, activity involving several arrays can take place simultaneously. The memory subsystem is structured to provide a pipeline type of overlapping activity so that activity involving several array units can be in progress simultaneously. Because the manipulation of the storage cells requires the most amounts of time in the memory unit, and because the arrays are performing this activity independently for each signal group, then the memory unit can be adapted to process the signal groups applied sequentially to the system without delay in nonexceptional circumstances, the most general exceptional circumstance being the masked write operation.
Bibliography:Application Number: CN19871002176